DisplayLink is looking to further expand its IC verification team with additional firmware / verification engineers who will specialise in the verification of reusable subsystems for our SoCs. Subsystems could contain one or more CPUs, USB, Ethernet, HDMI/DP, proprietary IP or a combination of these.
You will have either an IC or FW background with a strong interest in embedded software and associated methodologies for the purpose of IC development. The role will involve working with IC design, verification and firmware engineers to develop our test infrastructure and associated testcases which typically use multiple embedded processors and Python-based stimulus within a Python infrastructure. These are portable and reused between subsystem & SoC levels and between simulation, FPGA & the final IC.
With a philosophy of continuous improvement, every engineer is encouraged to propose enhancements to our flow and contribute to the advancement of our verification methodology.
Embedded C & assembler for 32-bit processors
Subsystem/SoC level verification of ASIC/FPGA
Simulation - Mentor Questasim or equivalent
Firmware/IC debug at RTL level
Prior IC tapeout experience
Embedded C++, RTOS
Video interfaces (HDMI and / or DP)
Git, Jenkins and / or SCons
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